Tech, ExplainedSemiconductors and devices
Product

Electronic design automation (EDA)

The software every chip is drawn in.

BEFORE ITAFTER ITElectronic designautomation (EDA)CadenceSynopsys Inc.PARTChip design verification+PARTPhysical design and sign-off+PARTHardware emulation+PARTAI for chip design+COVERSSimulationSynthesisPlace and routePer-engineerlicencesProcessor IP licensingsupplieslicensedcoresGPU and NPU IPsuppliesgraphicsenginesreceives thefinal layoutSemiconductor foundrystores everydesignversionVersion controlfor large files↗ DEVOPSchecks thepackagedesignSignal andthermal simulationCONCEPTS IT USESVLSI design flowVendor lock-inSemiconductor IP licensingBEFORE ITAFTER ITElectronic designautomation (EDA)CadenceSynopsys Inc.PARTChipdesign verification+PARTPhysical designand sign-off+PARTHardware emulation+PARTAI for chip design+COVERSSimulationSynthesisPlaceand routePer-engineerlicencesProcessorIP licensingsupplieslicensedcoresGPU and NPU IPsuppliesgraphicsenginesreceives thefinal layoutSemiconductorfoundrystores everydesignversionVersion controlfor large files↗ DEVOPSchecks thepackagedesignSignal andthermalsimulationCONCEPTS IT USESVLSI design flowVendor lock-inSemiconductor IP licensingBEFORE ITProcessor IP licensing↓ supplies licensed coresGPU and NPU IP↓ supplies graphics enginesElectronic design automation (EDA)CadenceSynopsys Inc.Chip design verification+Physical design and sign-off+Hardware emulation+AI for chip design+SimulationSynthesisPlace and routePer-engineer licencesAFTER IT↓ receives the final layoutSemiconductor foundry↓ stores every design versionVersion control for large files↗ DEVOPS↓ checks the package designSignal and thermal simulationCONCEPTS IT USESVLSI design flowVendor lock-inSemiconductor IP licensing
EDA software takes in licensed cores and graphics engines, and sends the finished layout to the foundry, every design version to version control and the package design to simulation.
opens a page inside this one a page in the same scene a page in another scene a concept page a label only, with no page

Electronic design automation (EDA) is the software in which every chip is described, simulated, checked and laid out before a factory makes it. Electronics students often meet it in a college VLSI lab. VLSI stands for very-large-scale integration, which means putting millions or billions of transistors on one chip. A transistor is a tiny electrical switch. No one could place billions of them by hand, so every step is done in software.

What does EDA software do? It covers each step of the VLSI design flow. Engineers first describe the chip's circuits in a hardware description language, such as Verilog. This is code that describes circuits, not a program that runs. Simulators then run that code to show how the circuits would behave. This is chip design verification, and it is often the largest part of the work. For very large chips, hardware emulation machines imitate the whole chip, so that real software can run on it before it exists. Synthesis tools turn the code into a network of logic gates, the small circuits that compute AND, OR and NOT. Finally, physical design and sign-off places every transistor, draws the wires and runs the final checks. The design then goes to the factory, a semiconductor foundry. That moment is called tape-out.

Two companies sell most of the world's EDA software. They do not sell it outright. A chip company pays for time-limited licences, usually for one to three years. Each licence lets one engineer run one tool at a time.

Here is a typical case. A design centre in Hyderabad has 400 engineers working on a networking chip. It holds, say, 250 licences for the simulator and 40 for the place-and-route tool. A licence server, a program on the company's network, hands out the licences. When an engineer starts a simulation, the server lends that job one licence. When the job ends, the licence goes back to the pool. In the last weeks before tape-out, every team runs more jobs, and engineers start waiting for free licences. So the company rents extra licences for just those weeks. A licence for the most advanced tools can cost tens of lakhs of rupees a year. So licences are one of a design centre's largest costs after salaries.

Chip companies rarely switch EDA vendors. Their scripts, checklists, trained engineers and years of old designs are all built around one set of tools. Moving to another vendor means redoing all of that, often in the middle of a chip project. This is a clear case of vendor lock-in. The design files are very large and change every day, so teams keep them in version control for large files.

The same two companies also sell ready-made blocks for chips, as in processor IP licensing. Their tools now include AI for chip design. Both run very large engineering centres in Noida, Bengaluru and Hyderabad, where much of the software is written.

Tech, Explained is a part of ingrid.fyi. Every page explains one piece of technology in plain words.