RISC-V

RISC-V is an instruction set that no one owns. An instruction set architecture, or ISA, is the fixed list of basic commands that a processor understands, such as add, compare and jump. Any company, university or person may design a processor that uses the RISC-V ISA without paying anyone for the right to do so. RISC-V is pronounced "risk five". It began in 2010 as a research project at UC Berkeley, a university. A non-profit body, RISC-V International, now looks after the rules, and its members include hundreds of companies.

Here is how it works in general. The rules of RISC-V are published openly. They describe a small base set of about 40 instructions, enough to run a program, and optional extensions that add more, such as multiplication, numbers with decimal points, or the maths used in AI. A chip team picks the extensions it needs. It then designs a processor core, the part of a chip that reads instructions and carries them out, following those rules. It may also add custom instructions of its own for one special job. Because the rules are shared, the same compilers and operating systems, such as Linux, work on every RISC-V chip that follows them.

The ISA is free, but a working core is not. Designing a core from scratch takes years. So many companies still buy ready-made RISC-V cores from specialists, through processor IP licensing. What they avoid is a fee for the ISA itself, and depending on one owner's terms. The weakness is software. Far fewer programs and tools have been written for RISC-V than for x86 or Arm, and building them takes years.

RISC-V is spreading from small controllers to phones, cars and AI chips. Take, for example, an AI accelerator start-up. It can place small RISC-V cores beside its maths engines to control them, and add custom instructions for AI without asking anyone's permission.

Consider a graphics and AI engine designed on RISC-V, which its maker licenses to companies building chips for phones and cars.

For instance, India's own processor projects are built on RISC-V. SHAKTI, from IIT Madras, and VEGA, from C-DAC, are families of RISC-V processors designed in India, including small ones for microcontrollers.

How is RISC-V different from Arm? Arm is also used in billions of chips, but the Arm ISA belongs to one company. Chip makers pay Arm a fee and a royalty on every chip, as described in semiconductor IP licensing. Arm's advantage is decades of software and tested designs. RISC-V's advantage is that no single company decides who may use it, or at what price.